Short Courses

Short Course 1:
13:30-15:00, Monday, May 31
"Photonic integration technologies for telecommunication and next generation computing systems"
Shinji Matsuo, NTT Photonics Laboratory

We will cover photonic integrated circuits (PICs) for optical communications and next generation computing systems using III ‐ V compound semiconductors. The development of wavelength division multiplexing technologies (WDM) requires the PICs that generate or receive optical signals to reduce the cost, space, and power consumption. Furthermore, coherent approaches using advanced modulation formats greatly increase the demand for constructing the PICs including Mach-Zehnder modulators, photodetector arrays, and waveguide filters. For computing systems, PICs have already used for rack-to-rack interconnection using vertical-cavity surface-emitting laser array. We will consider the feasibility of the PICs for off- and on-chip applications.

<Biography>
Shinji Matsuo received the B.E. and M.E. degrees in electrical engineering from Hiroshima University, Hiroshima, Japan, in 1986 and 1988, and the Ph.D. degree in electronics and applied physics from Tokyo Institute of Technology, Tokyo, Japan, in 2008. In 1988, he joined NTT Opto-electronics Laboratories, Atsugi, where he was engaged in research on photonic functional devices using MQW-pin modulators and VCSELs. In 1997, he researched optical networks using WDM technologies at NTT Network Innovation Laboratories, Yokosuka. Since 2000, he has been researching photonic integrated circuits for telecommunication and computing systems at NTT Photonics Laboratories, Atsugi. Dr. Matsuo is a member of the IEEE Lasers and Electro-Optics Society (LEOS), Japan Society of Applied Physics and the Institute of Electronics, Information and Communication Engineers (IEICE) of Japan.

Short Course 2:
16:00-17:30, Monday, May 31
"History, current status and remaining challenges of III-V MOS technology"
Peide D. Ye, Purdue University

In this short course, I will briefly talk about the motivation for high-k/III-V MOSFET research and summarize the historical development of the field with the details on Si/Ge interfacial control layer, in-situ MBE Ga-Gd-oxide and ex-situ ALD high dielectrics. The novel application of the ALD process on III-V compound semiconductors affords tremendous functionality and opportunity by enabling the formation of high-quality gate oxides and passivation layers on III-V devices. An inversion-mode n-channel Al2O3/InGaAs MOSFET shows a gate leakage current density less than 10-4A/cm2, a record high maximum drain current of 1.05 A/mm and a peak transconductance of 1.3 S/mm at deep sub-micron gate-length. Retrograde, halo-implantation and 3D FinFET structure are used to further improve the off-state performance of InGaAs MOSFETs. The review of this work and recent progress in this field can be found in IEEE Spectrum September 2008 and Science February 2009.

<Biography>
Peide D. Ye received the B.S. degree in electrical engineering from Fudan University, Shanghai, China, in 1988 and Ph.D. in solid state physics from Max-Planck-Institute of Solid State Research, Stuttgart, Germany, in 1996. From 1996 to 2000, he was research fellow at NTT Basic Research Laboratories and NHMFL/Princeton University. He joined Bell Laboratories, Murray Hill, NJ and then Agere Systems in 2001 as a Member of Technical Staff and became a Senior Member of Technical Staff in 2003. He joined Purdue University in 2005 as associate professor of electrical and computer engineering and becomes full professor in 2010. His research activities include semiconductor physics and devices, nano-structures and nano-fabrications, quantum and spin transport, atomic layer deposition, III-V MOSFETs, graphene nanoelectronics and all-oxide electronics.